Code Layout Optimization Guided by Temporal Profiling Information
Code layout influences application startup performance, yet remains difficult to optimize due to dynamic and workload-dependent execution behavior. Poor method placement degrades instruction cache utilization and increases page faults, effects that are especially pronounced in latency-sensitive systems. Existing approaches based on static analysis or frequency-driven profiling often fail to capture the temporal structure of execution during startup.
We introduce Temporal Code Layout (TCL), a code placement strategy for GraalVM Native Image that reduces startup latency by exploiting the chronological order of method first invocation. Using lightweight timestamping instrumentation in GraalIR, we record first-call events during profiling and arrange methods according to their execution order. Experimental results show consistent improvements in time to first response by reducing instruction cache misses and page faults during early execution.
Tue 17 MarDisplayed time zone: Amsterdam, Berlin, Bern, Rome, Stockholm, Vienna change
10:30 - 12:00 | |||
10:30 30mTalk | Code Layout Optimization Guided by Temporal Profiling Information MoreVMs Marko Spasic University of Belgrade and Oracle, Miloje Joksimović University of Belgrade and Oracle, Peter Hofer Oracle Labs, Milena Vujosevic Janicic University of Belgrade and Oracle Link to publication | ||
11:00 30mTalk | The Promise of Static Profiling: Exploring the Limits MoreVMs Milan Cugurovic Oracle and University of Belgrade, Aleksandar Prokopec Oracle Labs, Boris Spasojevic Oracle Labs, Zurich, Switzerland, Vojin Jovanovic Oracle Labs, Milena Vujosevic Janicic University of Belgrade and Oracle Link to publication | ||
11:30 30mTalk | Towards Least-Privilege WebAssembly Applications: Transparent Interposition for WebAssembly Components MoreVMs Link to publication | ||